summaryrefslogtreecommitdiff
path: root/llvm
diff options
context:
space:
mode:
authorFredrik Rinnestam <fredrik@crux.nu>2017-01-26 22:04:02 +0100
committerFredrik Rinnestam <fredrik@crux.nu>2017-01-26 22:04:02 +0100
commit228921d539b45602e9d72dc7d1bddf3fd02c3f35 (patch)
treecb5f54b3b3a24b9ab7da9b2e8bf44aec99f7d607 /llvm
parent21f6955f36ecf2fbaf664ed25fb6240b7a938a24 (diff)
parentc7e1a11b6423614e612828afcb98bb31a21ea390 (diff)
downloadopt-228921d539b45602e9d72dc7d1bddf3fd02c3f35.tar.gz
opt-228921d539b45602e9d72dc7d1bddf3fd02c3f35.tar.xz
Merge branch '3.2' into 3.3
Diffstat (limited to 'llvm')
-rw-r--r--llvm/.md5sum1
-rw-r--r--llvm/0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch120
-rw-r--r--llvm/Pkgfile6
3 files changed, 125 insertions, 2 deletions
diff --git a/llvm/.md5sum b/llvm/.md5sum
index cf2a68bbd..a7d6e60e5 100644
--- a/llvm/.md5sum
+++ b/llvm/.md5sum
@@ -1,2 +1,3 @@
+7b8219e2b0d15e96a09dbe8bc2614777 0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch
3259018a7437e157f3642df80f1983ea llvm-3.9.1.src.tar.xz
fcd6954a7fbd05687990e59e87131c3e llvm-config.h
diff --git a/llvm/0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch b/llvm/0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch
new file mode 100644
index 000000000..f9ec68c00
--- /dev/null
+++ b/llvm/0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch
@@ -0,0 +1,120 @@
+From d6b5bd6f44e8091a4c4870f1c52921c25a4f8cca Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Micha=C5=82=20G=C3=B3rny?= <mgorny@gentoo.org>
+Date: Sat, 21 Jan 2017 12:35:36 +0100
+Subject: [PATCH] Revert "AMDGPU: Fix an interaction between WQM and polygon
+ stippling"
+
+https://bugs.gentoo.org/603858
+---
+ lib/Target/AMDGPU/SIInstructions.td | 1 -
+ lib/Target/AMDGPU/SIWholeQuadMode.cpp | 7 +++++
+ test/CodeGen/AMDGPU/wqm.ll | 49 +++--------------------------------
+ 3 files changed, 11 insertions(+), 46 deletions(-)
+
+diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td
+index dde5f2fc6b4..18b7d5d62ef 100644
+--- a/lib/Target/AMDGPU/SIInstructions.td
++++ b/lib/Target/AMDGPU/SIInstructions.td
+@@ -2029,7 +2029,6 @@ def SI_RETURN : PseudoInstSI <
+ let hasSideEffects = 1;
+ let SALU = 1;
+ let hasNoSchedulingInfo = 1;
+- let DisableWQM = 1;
+ }
+
+ let Uses = [EXEC], Defs = [EXEC, VCC, M0],
+diff --git a/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+index 1534d582569..b200c153df0 100644
+--- a/lib/Target/AMDGPU/SIWholeQuadMode.cpp
++++ b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+@@ -219,6 +219,13 @@ char SIWholeQuadMode::scanInstructions(MachineFunction &MF,
+ markInstruction(MI, Flags, Worklist);
+ GlobalFlags |= Flags;
+ }
++
++ if (WQMOutputs && MBB.succ_empty()) {
++ // This is a prolog shader. Make sure we go back to exact mode at the end.
++ Blocks[&MBB].OutNeeds = StateExact;
++ Worklist.push_back(&MBB);
++ GlobalFlags |= StateExact;
++ }
+ }
+
+ return GlobalFlags;
+diff --git a/test/CodeGen/AMDGPU/wqm.ll b/test/CodeGen/AMDGPU/wqm.ll
+index 41e42645788..809a7ba9b82 100644
+--- a/test/CodeGen/AMDGPU/wqm.ll
++++ b/test/CodeGen/AMDGPU/wqm.ll
+@@ -17,18 +17,17 @@ main_body:
+ ;CHECK-LABEL: {{^}}test2:
+ ;CHECK-NEXT: ; %main_body
+ ;CHECK-NEXT: s_wqm_b64 exec, exec
++;CHECK: image_sample
+ ;CHECK-NOT: exec
+-define amdgpu_ps void @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
++;CHECK: _load_dword v0,
++define amdgpu_ps float @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
+ main_body:
+ %c.1 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %c, <8 x i32> %rsrc, <4 x i32> %sampler, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
+ %c.2 = bitcast <4 x float> %c.1 to <4 x i32>
+ %c.3 = extractelement <4 x i32> %c.2, i32 0
+ %gep = getelementptr float, float addrspace(1)* %ptr, i32 %c.3
+ %data = load float, float addrspace(1)* %gep
+-
+- call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %data, float undef, float undef, float undef)
+-
+- ret void
++ ret float %data
+ }
+
+ ; ... but disabled for stores (and, in this simple case, not re-enabled).
+@@ -415,46 +414,6 @@ entry:
+ ret void
+ }
+
+-; Must return to exact at the end of a non-void returning shader,
+-; otherwise the EXEC mask exported by the epilog will be wrong. This is true
+-; even if the shader has no kills, because a kill could have happened in a
+-; previous shader fragment.
+-;
+-; CHECK-LABEL: {{^}}test_nonvoid_return:
+-; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
+-; CHECK: s_wqm_b64 exec, exec
+-;
+-; CHECK: s_and_b64 exec, exec, [[LIVE]]
+-; CHECK-NOT: exec
+-define amdgpu_ps <4 x float> @test_nonvoid_return() nounwind {
+- %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
+- %tex.i = bitcast <4 x float> %tex to <4 x i32>
+- %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
+- ret <4 x float> %dtex
+-}
+-
+-; CHECK-LABEL: {{^}}test_nonvoid_return_unreachable:
+-; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
+-; CHECK: s_wqm_b64 exec, exec
+-;
+-; CHECK: s_and_b64 exec, exec, [[LIVE]]
+-; CHECK-NOT: exec
+-define amdgpu_ps <4 x float> @test_nonvoid_return_unreachable(i32 inreg %c) nounwind {
+-entry:
+- %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
+- %tex.i = bitcast <4 x float> %tex to <4 x i32>
+- %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
+-
+- %cc = icmp sgt i32 %c, 0
+- br i1 %cc, label %if, label %else
+-
+-if:
+- store volatile <4 x float> %dtex, <4 x float>* undef
+- unreachable
+-
+-else:
+- ret <4 x float> %dtex
+-}
+
+ declare void @llvm.amdgcn.image.store.v4i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
+ declare void @llvm.amdgcn.buffer.store.f32(float, <4 x i32>, i32, i32, i1, i1) #1
+--
+2.11.0
+
diff --git a/llvm/Pkgfile b/llvm/Pkgfile
index abac07ebe..684f9b50d 100644
--- a/llvm/Pkgfile
+++ b/llvm/Pkgfile
@@ -6,9 +6,9 @@
name=llvm
version=3.9.1
-release=2
+release=3
source=(http://llvm.org/releases/$version/$name-$version.src.tar.xz \
- llvm-config.h)
+ llvm-config.h 0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch)
build() {
export CC=gcc
@@ -16,6 +16,8 @@ build() {
cd $name-$version.src
+ patch -p1 -i $SRC/0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch
+
mkdir build
cd build

Generated by cgit